Deal done in 176 nanoseconds
A British company has developed a network switch that runs applications and assembles Ethernet traffic just-in-time for the high-frequency share trading market, claiming it reduces latency 25-fold.
Argon Design uses the Arista Network X7124 application switch featuring an Altera field programmable grid array (FPGA) circuit that has hardware access to eight of the 24 ten gigabit Ethernet ports.
Thanks to the FPGA and Intel Xeon processors, the latency of algorithmically generated trade drops from 4,600 nano seconds to just 176 nano seconds, or close to the theoretical minimum, according to Argon Design.
Ethernet frames are parsed as bits arrive, allowing partial information to be processed before the entire frame has arrived.
The switch uses preemption to send the overhead or routing and address information parts of TCP packets ahead of the payload, allowing for the completion of an outgoing order almost immediately after the end of a triggering market feed packet.
Inside the switch, the FPGA contains six million programmable gates that can be used for applications, and the device has 160 gigabit/s throughput.
High-frequency trading or HFT using computers matching bids for shares is controversial, as the technique is able to push through a large amount of transactions in a very short period of time, something opponents say can skew the market.
HFT is thought to have been reason for a brief stock market collaps in 2010, the “Flash Crash”. This saw the Dow Jones Industrial Average Index drop by over a 1,000 points or nine per cent in value, only to recover minutes afterwards.